The present invention relates to formation of bipolar transistors.
The present invention solves two problems associated with the fabrication of bipolar transistors. First is the difficulty in obtaining the shallow, highly-doped emitters which are required for good injection efficiency and narrow depletion widths in scaled bipolar devices. Second is the high temperature drive required for emitter junction formation which limits process flexibility, since any dopants already in the device are subject to diffusion.
In particular, the P+ extrinsic base (i.e. the heavily doped p+ region which surrounds the more lightly doped "intrinsic base" region which is actually interposed between the emitter and collector) will diffuse rapidly during a high temperature (1000.degree. C.) anneal, which would alter the base/emitter and base/collector junction locations and limit the scalability of the device. For this reason, it has been necessary, in all prior art attempts to make scaled bipolar devices, to make the emitter before the extrinsic base region. This constraint has greatly impeded attempts to develop advanced processing schemes. In particular, such a process sequence is not very amenable to self-aligned emitter-base schemes, which are also necessary to improve design registration tolerance in scaled devices. Many schemes have been aimed at circumventing this difficulty, but, if the emitter could be formed after the extrinsic base without disturbing the base doping profiles, then self-aligned emitter-base structures would be inherently easier to fabricate.
The standard approach to achieving shallower emitter junctions is to use low energy, high-dose arsenic implants. However, the implant must be treated at high temperatures (1000.degree. C.) to fully activate the dopant and anneal implant damage. As doses become higher with scaling needs, implant damage will become excessive.
Another newer technique involves the use of polysilicon as a diffusion source. The polysilicon is in intimate contact with the epitaxial growth surface and the dopant is implanted into, and driven through, the polysilicon to form the emitter junction in the single crystal epitaxial silicon surface. Although shallow emitter junctions can be formed in this manner, a high temperature drive still appears to be necessary.
Thus, it is an object of the present invention to provide fabrication of bipolar devices without high-temperature drive-in of the emitter doping.
It is a further object of the present invention to provide a method for fabricating bipolar transistors without disturbance of the base doping profile during emitter drive-in.
It is a further object of the present invention to provide a method for fabricating bipolar transistors without incurring heavy implant damage at the surface of the emitter.
Another difficulty in bipolar transistor fabrication is the n+ to p+ spacing required between the emitter contact doping and the extrinsic base doping. This spacing must be preserved, or the base-emitter breakdown voltage will collapse. However, the need for this spacing makes it difficult to use emitter lateral widths as small as would otherwise be possible.
It is a further object of the present invention to provide a method for fabricating bipolar transistors in which the emitter doping is self-aligned to the emitter contact pattern.
It is a further object of the present invention to provide a method for fabricating bipolar transistors in which the emitter doping does not require an excessively heavy dose.
Although the foregoing objects have been primarily described in reference to emitter formation in a bipolar transistor having a substrate collector and a surface emitter, all of the foregoing objects and all of the following disclosure is equally applied to inverted bipolar structures in which the collector is at the surface and the emitter is closer to the substrate, in which case the present invention is useful for collector doping.
The present invention achieves the foregoing objects, as well as other advantages, by a process wherein, after the extrinsic base region of a bipolar transistor has been formed, and the emitter contact has been patterned and cut, the emitter dopant is deposited or spun on, and the emitter dopant is then driven in using a short pulse of radiant energy. The necessity for high-temperature annealing of the emitter doping is thereby avoided, and the base doping profile is not disturbed by high-temperature annealing steps.
This provides at least three key advantages: first, the base doping profile is not significantly disturbed by emitter drive-in. Second, in the preferred embodiment, the base, emitter, and emitter contact are all three self-aligned. Third, the emitter contact etch occurs before the emitter contact doping is in place, so there is no uncertainty about how much dopant may have been removed from the emitter contact area by the contact etch, and high conductivity is preserved.
According to the present invention there is provided:
1. A process for fabricating integrated circuits comprising bipolar transistors, comprising the steps of:
providing a substrate having, at at least predetermined device locations, first conductivity type collector/emitter regions, second conductivity type intrinsic base regions above said collector/emitter regions, and first conductivity type surface regions above said intrinsic base regions, all formed in crystalline semiconductor material having a vertically continuous lattice structure through said collector/emitter, intrinsic base, and surface regions;
partially covering said surface region with a patterned protective layer, said patterned protective layer exposing portions of said surface layer;
depositing a first-conductivity-type dopant source over said patterned protective layer and said exposed portions of said surface layer, and applying transient radiant heating to said dopant source, whereby heavily-doped first-conductivity-type emitter/collector regions are formed within portions of said surface layer.